1. Field of the Invention
The present invention relates generally to printed circuit boards, and more particularly, to a method of manufacturing a substrate for mounting electronic components. More specifically, the present invention relates to a method of manufacturing a low cost printed circuit board (PCB) substrate having an integrated leadframe and a heatsink such that the connection portions of electronic components are mounted on the substrate and the corresponding leads protruding from the substrate are electrically connected. This invention also relates to semiconductor devices, and more particularly to a multi-device semiconductor component.
2. Background of the Invention
Electronic components are typically packaged on a printed circuit board. Therefore, electronic component mounting printed circuit boards in various forms have been developed and proposed.
There is, for example, the so-called DIP (Dual In-line Package) type of connection for connecting electronic components and terminals to external connections, such as leads, in a printed circuit board. In the DIP connection a plurality of leads electrically independent of one another are protruded from a base member and the respective leads and the connection portions of the electronic components mounted on the base member are electrically connected.
With the increasing complexity and miniaturization of present day electronic apparatus, an increasing demand has developed for densely packaged integrated circuit devices. This demand has exceeded the ability of semiconductor manufacturers to deliver specific monolithic solutions, thus creating a pressing need for a PCB whereby a number of integrated circuit devices can be interconnected on a single substrate. The present invention meets this requirement and combines a plurality of individual integrated circuit devices on a single substrate which is mechanically compatible with previous generations of semiconductor packages to take advantage of existing automatic manufacturing and assembly techniques.
Various techniques for the interconnection of individual semiconductor devices in high density applications have been developed. One technique, which is described in U.S. Pat. No. 4,305,204 and illustrated in FIG. 1, utilizes LED 33 (Light Emitting Diode) chip arrays which form alpha-numeric characters on the top side of a PCB substrate 11 and a CMOS decoder/driver chip 44 on the bottom side between the dual in-line leads 55. The LED 33 and the chip 44 are encapsulated in a transparent plastic housing 77 having a transparent epoxy 88, thus forming a transparent, dual in-line lead LED Package.
Another technique, shown in FIG. 2, utilizes an etched copper heatsink 66 (0.012 inch thick) laminated between two double sided PCBs 11 and 22. The LED arrays 33 are mounted on the top side of the top PCB 11 and the decoder/driver chip 44 is mounted on heatsink 66 through a cavity formed in the bottom PCB 22. The leads 55 are subsequently soldered to the bottom side of the bottom PCB 22. The above-formed structure is encapsulated in a transparent housing 77.
A disadvantage with the techniques shown in FIGS. 1 and 2 is that they are not capable of being fully automated and thus are undesirably expensive.